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Publications Library

Advances in Metal Deposition for Wafer Bumping by Matt Dorogi, Mark Welsh, and Arthur Keigler, from Advanced Packaging, 2/06 [500k]


Apollo Sputter Deposition Systems

Apollo Datasheet 7/08


Stratus Electrodeposition Systems

Stratus Datasheet 7/08

Enabling 3-D Design, by A. Keigler, K. O'Donnell, Z. Liu, B. Wu, J. Trezza, Semiconductor International, August 2007.

Reaction Engineering of Through-Chip Via Filling for Wafer-Level 3D Packaging, by D.P. Barkey, J. Callahan, A. Keigler, Z. Liu, A. Ruff, J.. Trezza, and B. Wu, presented at ECTC 2007. Presentation made at ECTC 2007.

Pattern Effects on Electroplated Copper Pillars, by A. Keigler, B. Wu, J. Zhang, Z. Liu, presented at IWLPC November 2006.

Copper Deposition for Pillars and Vias Semiconductor Manufacturing, August 2006.

Active Boundary Layer Thinning in Advanced Packaging Electroplating Semiconductor International, June 2006.

Diffusion Boundary Layer Studies in an Industrial Wafer Plating Cell Journal of The Electrochemical Society, 152 (5) (2005)


Nimbus Sputter Deposition Systems

Nimbus Brochure 5/04

Nimbus video - 7/03 [15.5 MB]
Note: video requires QuickTime 5 to play. QuickTime is available as a free download at: www.apple.com/quicktime/download/

PVD Processing for Flip Chip: Considering Adhesion Layer Properties by A. Keigler, S. Golovato, K. O'Donnell, J. Chiu, R. Hollman, Advanced Packaging, October 2007.

Alternative UBM for Lead Free Solder Bumping using C4NP by K. Ruhmer, E. Laine, K. O'Donnell, J. Kostetsky, K. Hauck, D. Manessis, A. Ostmann, M. Toepper, N. Juergenseen, presented at ECTC 2007. Presentation made at ECTC 2007.

Pulsed DC Sputtered Aluminum Nitride: A Novel Approach to Control Stress and C-axis Orientation by P. Soussan, K. O'Donnell, J. D'Haen, G. Vanhoyland, E. Beyne, and H. Tilmans, presented at MRS meeting, Boston, 2004

Under Bump Metallurgy for Lead-free Solder by Kathy O'Donnell; article in "Lead-free Electronics: Essential Information on the Lead-free Transition," a supplement to Advanced Packaging, Connector Specifiier, and SMT magazines, November 2004

Characterization of reaction rates and intermetallic phase formation for Cu, Ni and NiV UBM layers with SnPb and lead-free SnAg solders by K. O'Donnell, NEXX Systems; D. Gupta, APSTL; P. Silberud, Semitool; and C. Lopper, L. Dietrich and M. Toepper, Fraunhofer (IZM); presented at Flip Chip Conference 2004

Additional material to above document, presented during Semicon Taiwan September 2004

A Sputtered Nickel Under Bump Metallurgy Structure for Lead-free Solder for Use in Flip Chip Packaging by K. O’Donnell, J. Kostetsky, R. DeVito, NEXX Systems; and V. Bellido-Gonzalez, S. Powell, D. Monaghan, Gencoa; presented at the Flip Chip Conference 2003 with supplemental presentation materials

Stress control in NiV, Cr and TiW Thin Films used in UBM and Backside Metallization by K. O’Donnell, J. Kostetsky, and R.S. Post, presented at the Flip Chip Conference 2002


Cirrus Systems

Cirrus Brochure 10/02

Silicon nitride films deposited at substrate temperatures <100 °C in a permanent magnet electron cyclotron resonance plasma by C. Doughty et al., JVSTA 17(5) Sep/Oct 1999.

Low stress SiN films deposited by low temperature ECR PECVD by R. Devito and K. O’Donnell, Oct 2002

Tech Brief: Plasma Cleaning

Tech Brief: Surface Modification


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